Category Archives: Retrochallenge

RetroChallenge 2017/10 – Mid challenge – all the red herrings.

Oh now this is getting a bit disappointing.

It was a bit too much to think the tri-state buffers had failed and changing them one by one made no difference. Hmm.

I think that the screen memory is OK because the noise on the screen shows each of the bits both set and cleared so no sticky bits either high or low.

I wrote a noddy program and blew ROM just to clear the video RAM and nothing else. It didn’t fix anything but, on reset it tends to look a bit different. I’m not sure what any of this means.

Sometimes I do wish I could get an old machine and it would just work.

Never mind. More next time.

 

RetroChallenge 2017/10 – Purely by coincidence

So here’s a thing. I recently met up with an old acquaintance who I hadn’t seen in years and as we’re both retro-computing fans we were talking about old machines.

I have just received an email from an old acquaintance of mine who is a dedicated retro-computing fan and has spotted my plight in these pages after following me on Twitter (@acollins22 if you’re interested).

He mentioned that he had had a similar problem on a Nascom a few years ago and it was caused by a buffer failing. Now I know this is wishful thinking but it’s worth a look.

The chip in question was an 81LS97, a 3-STATE Octal Buffer.

I’m not the most familiar with this to be honest, a keen amateur. My take on this is that Y1 will equal A1 when _G1_ is low. At other times it will be tri-stated. The other pairs (A2-Y2, A3-Y3 and A4-Y4 will do the same).

Is this right.

I wired up my old Blackstar logic analyser to IC47, the 81ls97 as follows…

  • CH0 – _G1_
  • CH1 – A1
  • CH2 – Y1
  • CH3 – A2
  • CH4 – Y2
  • CH5 – A3
  • CH6 – Y3
  • CH7 – A4

It’s set to trigger on CH0 being low. This is what we get.

What I see here is CH0 going low and so the outputs are enabled. Surely that means that CH4 should echo CH3 but as you’ll see, it doesn’t.

Does that mean I have a faulty 81LS97 or a faulty understanding of what’s going on. It seems a coincidence that a friend tells me how he fixed his Nascom and mine has the same fault but the trace above suggests just that.

Spooky.

RetroChallenge 2017/10 – More things it’s not

Having checked the clocks and finding things look well, it’s time to see if the ROMs are OK.

The Nascom uses 2708 EPROMs. These are 1k by 8 bits and must have been one of the first EPROMs available. The problem with them is that they need three different voltage rails and most modern EPROM programmers can’t do that. Even my old Stag won’t. :-(.

I can program 2716s however as these only need a single 5V rail and thanks to tkc8800 I was able to make a couple of plug in adapters so I can use the bottom half of two 2716s to replace the 2708s.

I have now put Nassys3 in the two 2716s and tried that.

Still the same… Arrgghhh!

 

RetroChallenge 2017/10 – Still looking for clues

In my last post I was suspecting the clocks.

Now I’m not so sure there is a problem with the clocks. Having traced them through everything looks fine. I’m not sure what I was doing wrong but the symptoms haven’t changed but I’m seeing bus activity now and also the _CS_ on the main 2708 EPROM is wiggling around as I suspect it should.

I’ll see if I can read the EPROM and see if it has bit-rot.

EDIT…. It turns out my programmer can’t read 2708s. Doh.

RetroChallenge 2017/10 – and the beat goes on

Yesterday I checked the voltages with my DMV and everything looked OK. Today I checked with the ‘scope just to check for ripple and they all look pretty clean to me.

Clocks

I also saw that there was a running clock but overnight I became increasing worried that it wasn’t a very good clock.

Here’s the circuit…

It doesn’t look too tricky.

Check with the scope.

A scope trace shows it’s a bit funny. I’m not sure quite what the Z80 needs but I thought it should have a better back edge than that.

More thought needed.

RetroChallenge 2017/10 – Let’s see what we’re up against

So, it starts.

In my last post I said that I intended to fix my newly acquired but already much loved Nascom-1.

Up until now I hadn’t even powered it on but the time has come.

Tada!

So that’s it, random nonsense. The reset button makes the screen flicker but the nonsense doesn’t change.

The previous owner said that he had tried a new CPU, cleaning all of the tarnish of the chips and the 74LS139 and 74LS11 associated with the video RAM address decoding.

He’s clearly better at this than I am but I’m still going to try and get this old one going.

First things first

Out with the multimeter and check the power supply. There are three rails; 5V, -5V, 12V and -12V. Helpfully there are four LEDS on the PSU board and they are all lit up. Also, the meter confirms that all are present and correct.

The bits on the bus go up and down

Sadly actually most of them don’t. I fired up the oscilloscope and looked at the signals on the pins of the Z80 CPU. There is very little activity. There is a clock signal on pin 6. MREQ is toggling. There is little else. There is no activity on M1 that signals the start of an instruction. The data pins are all high as are the address pins.

Surely there should be activity on the address bus?

That’s it for Today. I will read up on bus access and try to see why the address lines aren’t changing.

 

Retrochallenge 2017/4 – Interak CF card – Wrap up

Well Retrochallenge 2017/4 is coming to an end and it’s time to wrap up this season’s efforts.

I set myself the challenge of adding CF card support to my Interak-1 and basically, I didn’t make it.

However, since the last post I have made some progress; I have tried two new CF cards (thanks to Spencer at RC2014.co.uk for that). These gave different results to the original and seemed to work better.

I still don’t understand why two different but equivalent I/O commands give different results. It has been suggested that timing is the issue here but I don’ know enough about Z80 hardware to try and add a wait-state when accessing the CF card.

The current state of play is that I think I can read the card but as I don’t have a way of writing to the card on a different machine, I can’t prove it :-(. I have a write routine written on the Interak but I don’t think it’s working.

On the plus side, I have built an adapter to add a CF card to my machine by adapting hardware intended for the splendid RC2014 machine. That’s not too shabby.

There is more work to be done here.

 

So long Retrochallenge, it’s been fun. See you in October!.

Retrochallenge 2017/4 – Interak CF card – Part 4

We are well into the second half of Retrochallenge now and it fair to say that I’m not where I wanted to be. However I am learning a great deal about Z80s and CF cards are their respective wily ways.

Things continue to be confusing.

A quick re-cap of my previous posts…

It started off with the status of the CF card never showing that the read transfer was ready. However, using the ROM monitor on the Interak rather than the program showed that it was. There were various trials and hair being pulled out but what it boils down to is this.

If I use…

    ld        BC, (0x0067)
    in        a, (C)

I get one value but if I use…

    ld        a, 0x00
    in        a, (0x67)

I get a different answer.

Note 0x67 is the CF card status port.

According to the Z80 manual from Zilog, in a, (C), puts B on to the top of the address bus, C on to the bottom and reads from the addressed I/O port. So that’s 0x0067.

Now, in a, 0x67, puts A on to the top of the bus (previously loaded with 0) and 0x67 on to the bottom and reads the addressed I/O port.

These two are functionally the same but give different results.

One suggestion that has been made though the VCfed forums is that it’s a timing issue as the in a, (C) version takes a little longer.

I have a few things to try. I have a couple of other CF cards on order and they should arrive soon. I’ll try them to see if there is some issue with the timing of this card. I’ll also look to see if I can get a wait state in to the IN operation.

More news when I have it.

 

Retrochallenge 2017/4 – Interak CF card – Part 3

Things are a little weird as I suggested in my previous post.

I have the CF card installed and if I use the ROM monitor in the Interak to access it through a series of Port commands, I can see what appears to be sensible data. If, however I use a piece of Z80 assembly language, I never see the CF card become ready.

I have tried my own code and two other variants found on the web.

Let me show you what I mean. This snippet came from Scott Baker’s website…

1069:         	WAITDRQ:
1069: F5      	        PUSH    AF
106A:         	WAITDRQLP:
106A: DB67    	        in 	A,(I7)
106C: E608    	        AND 	08H
106E: FE08    	        cp 	08H
1070: 20F8    	        JR	NZ, WAITDRQLP
1072: F1      	        POP 	AF
1073: C9      	        RET

To use this, I have set up the sector and all other parameters needed for a disk read. If I run this routine, it never finishes. breaking the code at 0x106C shows that the accumulator is either 0x40 or 0x41. Which means “Drive ready” or “Drive ready + error”.

However, if I use “P 67” at the monitor, I get “0x58” which means “Drive ready + Drive seek complete + Data request ready”.

I can run from 0x106A to 106C again and again I see 0x40 or 0x41 in the accumulator. If I use “P67” again, again I see 0x58.

Can anyone see the deliberate mistake because I can’t 🙁